Magnetic random access memory (MRAM) is a type of non-volatile memory that uses magnetism rather than electrical power to store data. Conventional MRAM cells are described in U.S. patent application Ser. No. 10/907,977, entitled “Magnetic Random Access Memory Device,” by Jhon Jhy Liaw, and are herein incorporated by reference.
FIG. 1 illustrates a cross-sectional view 100 of a known magnetic tunnel junction (MTJ) MRAM cell. A typical MTJ MRAM cell includes a layer of insulating material 102 sandwiched between two electrodes of magnetic material. The insulating material 102 is also called a tunneling barrier. One electrode is a fixed ferromagnetic layer 104 that creates a strong pinning field to hold the magnetic polarization thereof in one specific direction. The other electrode is a free ferromagnetic layer 106 which is free to rotate and hold polarization in one of two directions. The free ferromagnetic layer 106 is connected to a top electrode and led to a bit line 108. The fixed ferromagnetic layer 104 is connected to a bottom electrode leading to a word line 110.
Similar to other types of magnetic memory cells, the MTJ MRAM cell has a low logical state and a high logical state associated with a low resistance state and a high resistance state respectively, or vice-versa. When the fixed ferromagnetic layer 104 and the free ferromagnetic layer 106 have the same polarization for their magnetic fields, the MTJ MRAM cell will be in a low resistance state. When their polarizations are opposite, the MTJ MRAM cell will be in a high resistance state. The resistance state can be read or detected by having a current flow from one magnetic layer to the other through the insulating material 102. The high or low resistance state determines the output current from an MRAM cell. Conventionally, a sense amplifier is used to compare the output current with a reference cell.
Conventional MRAM cells have several limitations. One limitation is that of speed in reading data from the cells. Currently, logic circuits are operating at frequencies in the GHz ranges. However, conventional MRAM devices are constrained to operate at much slower rates, causing a significant performance gap between the logic and the MRAM memory. This performance gap results in a suboptimal performance of the logic circuits because supporting MRAM memory devices cannot provide data and instructions fast enough. Thus, this results in a bottleneck effect at the MRAM devices, particularly in System on Chip (SoC) designs, which combine memory with logic circuitry on a chip.